Liquid crystal displays are used in a wide variety of commercial applications including portable (laptop) computers, wristwatches, camcorders and large screen televisions. Liquid crystal light valves, used as spatial light modulators, may be used in projection systems as well as optical computing applications. Limitations inherent in the existing technology come from the necessity of fabricating the displays on transparent glass or quartz substrates which are not amenable to high quality electronic materials. Fabrication of displays on bulk silicon, although of high crystal quality, unnecessarily constrains the display to reflective mode schemes due to the opaque substrate and is not applicable to transmissive applications. The ability to integrate drive circuitry using thin-film transistors (TFTs) with liquid crystal displays has improved reliability and has allowed the use of this technology in lightweight, portable applications. However, the integration of display driving circuitry has been substantially limited to thin film transistor technology using amorphous (a-Si) or polycrystalline (p-Si) silicon deposited on glass or quartz substrates. Lattice and thermal mismatch between the silicon layer and the substrate, and the low temperature deposition techniques used in the a-Si and p-Si technologies result in a silicon layer with poor charge carrier mobility and crystallographic defects. These limitations are directly related to inferior electronic device performance and limitations when compared to bulk silicon.
Of particular importance for integrated display systems is the desire for higher density circuitry for ultra-high resolution display and light valve applications and for the monolithic integration of display driver circuitry and related signal processing circuitry on-chip. The characteristic lower (electrical and crystallographic) qualities of a-Si and p-Si materials result in poor fabrication yields when compared to conventional Very Large Scale Integration (VLSI) processing. Overcoming this problem generally requires the use of redundant circuit elements in each pixel to ensure fully functional displays. This redundancy requires an concomitant increase in pixel size, thereby preventing the manufacture of ultra-high resolution liquid crystal displays. The additional circuit elements also reduce the aperture ratio, i.e. the fraction of pixel area allowing transmitted light, thereby reducing the brightness of the display, or light valve.
Furthermore, low carrier mobility, low speed, low yield a-Si and p-Si materials are incompatible with VLSI design and fabrication techniques which would otherwise allow integration of video drivers, digital logic and other computational circuitry on-chip thereby offering designers greater functionality, higher reliability, and improved performance.
B. Bahadur, editor, Liquid Crystals: Applications and Uses, Vol. 1, World Scientific, New Jersey, 1990, pp. 448-451 reviews the state of the art in active matrix displays for projection display applications. Active-matrix displays use one or more nonlinear circuit elements, e.g. TFTs or diodes, to switch the liquid crystal capacitor in each pixel. Among the materials discussed for these applications includes silicon-on-sapphire (SOS). The authors state recognized limitations of SOS on page 450 xe2x80x9calthough SOS devices have excellent performance in terms of drive current and speed, they have leakage currents which are too high for use in an active matrix display.xe2x80x9d Excessive leakage results in a drop in voltage across the liquid crystal capacitor which, in the case of commonly used nematic liquid crystals, results in a change in orientation and gray level.
Thus, a continuing need exists for an electrically addressable ultra-high resolution nematic liquid crystal display or light valve system which monolithically integrates an active matrix display with its associated drive and image processing circuitry.
The present invention provides a method for fabricating a monolithically integrated liquid crystal display array and control circuitry on an ultra-thin epitaxial silicon layer which comprises a silicon-on-sapphire structure. The method comprises the steps of: a) forming an epitaxial silicon layer on a sapphire substrate to create a silicon-on-sapphire structure; b) ion implanting the epitaxial silicon layer; c) annealing the silicon-on sapphire structure; d) oxidizing the epitaxial silicon layer to form a silicon dioxide layer from a portion of the epitaxial silicon layer so that a thinned epitaxial silicon layer remains; e) removing the silicon dioxide layer to expose the thinned epitaxial silicon layer; f) fabricating an array of pixels from the thinned epitaxial silicon layer; and g) fabricating integrated circuitry from the thinned epitaxial silicon layer which is operably coupled to modulate the pixels. The thinned epitaxial silicon supports the fabrication of device quality circuitry which is used to control the operation of the pixels.